Cart
0
Product
Products
(empty)
No products
To be determined
Shipping
$0.00
Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart.
There is 1 item in your cart.
Total products
Total shipping
To be determined
Total
Reduced price!
View larger
View larger
EIA JESD 8-15A:2003
New product
EIA JESD 8-15A:2003
Stub Series Terminated Logic for 1.8 V (SSTL 18)More info
This standard defines the input, output specifications and ac test conditions for devices that are designed to operate in the SSTL_18 logic switching range, nominally 0 V to 1.8 V. The standard may be applied to ICs operating with separate VDD and VDDQ supply voltages. The VDD value is not specified in this standard; however VDD and VDDQ will have the same voltage level in many cases.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.200 : Integrated circuits. Microelectronics
|
| Number of pages | 22 |
| Year | 2003 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 8;EIA 8;EIA 8.15A;8;EIA JESD8-15A |