EIA JESD 22-A105C:2004 (R2011)

This test method applies to semiconductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes with operating biases periodically applied and removed. It is intended to simulate worst case conditions encountered in typical applications. The power and temperature cycling test is considered destructive. It is intended for device qualification.