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EIA JESD 75-5:2004
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EIA JESD 75-5:2004
SON/QFN Package Pinouts Standardized for 1-, 2-, and 3-Bit Logic FunctionsMore info
This standard defines device pinout for 1-, 2- and 3-bit wide logic functions. This pinout specifically applies to the conversion of Dual-Inline-Packaged (DIP) 1-, 2- and 3-bit logic devices to SON/QFN packaged 1-, 2- and 3-bit logic devices.
The purpose of this document is to provide a pinout standard for 1-, 2- and 3-bit logic devices offered in 5-, 6- or 8-land SON/QFN packages for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease of use.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 31.080.01 : Semiconductor devices in general
|
| Number of pages | 13 |
| Year | 2004 |
| Document history | |
| Country | USA |
| Keyword | EIA JESD 75;EIA 75;EIA 75.5;75;EIA JESD75-5 |