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JIS C 6521:1996 (R2015)
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JIS C 6521:1996 (R2015)
Test methods of prepreg for multilayer printed wiring boardsMore info
This Japanese Industrial Standard specifies test methods of prepreg for multilayer printed wiring boards.
| Author | JSA |
|---|---|
| Editor | JSA |
| Document type | Standard |
| Format | File |
| Confirmation date | 2015-10-20 |
| ICS | 31.180 : Printed circuits and boards
|
| Number of pages | 12 |
| Replace | JIS C 6487 (1980) |
| Cross references | IEC 60249-3-1 (1981), MOD |
| Year | 1990 |
| Document history | JIS C 6521 (1996-01-01) |
| Country | Japan |
| Keyword | JIS 6521;6521;JIS C 6521-1996 |